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For
information on Downconverter IP cores, including ChannelCore64 please
see here.
RF
Engines Ltd (RFEL) has developed high specification FPGA-based downconverter
channelisers for a range of different applications. The cores are
designed to extract a number of signals from a wideband input source,
filter and downconvert to baseband. The range of cores available
includes fixed configuration cores that are optimal for a specific
fixed requirement and configurable cores that provide real-time
control of channel parameters such as centre frequency, bandwidth
and output rate.
Being FPGA-based, RFEL's existing reference designs can be tailored
to meet particular processing and interface requirements, such as
input/output format, number of channels, dynamic range and filter
shape.
The designs are based on novel frequency transform techniques that
allow downconversion of a large number of channels in a highly efficient
manner, reducing system cost and complexity. The designs are sold
as Intellectual Property (IP) cores to equipment manufacturers and
allow a reduced risk route and a faster design cycle.
.

The channeliser range includes the following classes of core.
1) Fixed multichannel downconverter cores that channelise
a very large number (up to thousands) of channels, where the channels
have a fixed spacing and all share the same filter shape and output
sample rate.
2) Flexible multichannel downconverter cores providing channelisation
of a large number (up to hundreds) of relatively narrowband channels
from a wideband input. These channeliser cores can be used to efficiently
extract channels from any dynamically selectable frequency with
a very wide variety of channel sample rates and filter characteristics/bandwidths.
3) Wideband DDC cores providing downconversion of a few relatively
wideband channels from a wideband input.
Key
Features :
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Downconversion of 1000s of channels in a single FPGA. |
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Wide
input bandwidths supported, up to GHz |
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Use
of silicon efficient frequency transform techniques for channelisation. |
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Bit
true Matlab models allow simulation of the channeliser, reducing
the development risks. |
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Xilinx and Altera FPGA devices supported |
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Designs are customised for each application to minimise silicon usage |
Key
Applications
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Telecommunications
base stations |
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Satellite
communication systems |
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Software
defined radio |
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Military
communications systems |
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Radio
monitoring systems |
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