There are many applications that require the spectral information gained from an FFT, or other filter bank, to be converted to power and accumulated. The averaging effect of this type of function can improve spectral visibility, for example, constant signals will appear more clearly above random noise in the spectral view. The other benefit of this type of processing is the reduction in data rate output from the FPGA, thus easing the interface issues with the rest of the system design
The RFEL power block accumulator core performs both the conversion to power and power accumulation functions, as shown in the diagram below.
Basic Structure:
The number of blocks of data to be accumulated within the core can be programmed by an external interface. The core can process complex data, with or without gaps between each block. In this example a block is defined as 1024 samples of continuous complex data, which can be supplied by a 1024-point Vectis 'HiSpeed' FFT.
The Power Block Accumulator core is provided in EDIF netlist form as a component.
The core can be supplied in different, bit widths, block length formats and accumulation ranges
Features
- Proven in Xilinx and Altera devices
- Easy migration to most FPGA Vendors devices and architectures
- Variable length accumulation
- Various data input/output bit widths can be implemented
- Fully synchronous design.
Applications