The RFEL CORDIC (Co-Ordinate Rotation Digital Computer) core provides the means to extract magnitude and phase information from an I&Q data stream, or to provide Sine/Cosine conversion of an input angle vector. The CORDIC is available in two modes. Vectoring mode provides Rectangular (Cartesian) to Polar conversion of two input vectors (e.g. I&Q). Rotational mode provides Sine and Cosine conversion of an input vector, thus providing an accurate quadrature oscillator when coupled with a ramp generator.
The accuracy of the output is determined by the internal arithmetic bit-width and the number of iterations (clock cycles) the processor takes to produce an output. These parameters can be specified by the customer or optimised by RFEL to meet accuracy specifications.
The CORDIC processor is available in two distinct architectures:
'Iterative' for low speed, high silicon efficiency solutions
'Pipelined' for high speed applications.
Features
• Proven in Xilinx and Altera.
• Continuous real time processing up to 250Msps depending on Target technology.
• Optimized for the speed silicon trade off.
• Choice of architecture to best suit the application or available silicon area.
• Custom designed to meet the customers accuracy specification.
Architecture Features
- Iterative Vectoring Low silicon usage. Max data output rate better than (100MS/s/Number of iterations).
- Iterative Rotational Low silicon usage. Max data output rate better than (100MS/s/Number of iterations).
- Pipelined Vectoring Optimised for speed. Data throughput better than 200MS/s.
- Pipelined Rotational Optimised for speed. Data throughput better than 200MS/s.
- CORDIC gain compensation can be built in if required.
Applications
Please contact sales on the contacts page for further information